Xilinx is a USA based semiconductor manufacturing organisation. It was established in 1984 and its headquarter is in San Jose, USA. It was the one who first created the fabless manufacturing model. During jobs one of the co founder Xilinx (Ross Freeman) wanted to developed a chips that perform like a blank tape and on that blank tape users have an options to done their programming. For development of this concept was required lots of transistors.
They have done the innovation in Automotive, 5G Wireless, Data Center, Aerospace & Defense, Broadcast & A/V, Consumer, Industrial, Medical & Science, Test, Measure & Emulation, Wired Communications, Wireless Infrastructure. It is accelerate a broad set of applications in big data and artificial intelligence. Its include video transcoding, database, data compression. Using ACAP products many software developers will be able to design their products.
They sells a broad range of FPGAs products. It was founded by Jim Barnett, Ross Freeman, Bernie Vonderschmitt. They have done the designs, development and markets these programmable logic products. They provide services in design, training of customer, field engineering and provide technical support.
Headquarter: San Jose, California, U.S.
Industry: Integrated circuits
Company Type: Private
What are the Education and Experience Required in Xilinx 2020 for Design Engineer Intern?
EDUCATION & EXPERIENCE DETAILS:
Job Location: New Delhi
Job Schedule: Full Time
Job Shift: Day Job
Applicants should be MTech or BTech from any recognised university.
Applicants should have an understanding with at least one programming language.
They have done the courses which includes digital design as well as Ethernet networking.
Applicants should have an excellent verbal and written communication skills.
Applicants should have an excellent organizational skills and attention to detail.
Applicants should have a basic exposure to Verilog.
Applicants should have a basic exposure of Python.
Applicants should have an exposure of simulation as well as building block level verification suites.
Applicants should have an basic understanding of industry-standard EDA tools from Cadence, Synopsys or Mentor.
You should have a knowledge of FPGA.
You should have a knowledge of Xilinx ISE or Vivado Design Suite and Xilinx Embedded Development Kit.
How to apply Xilinx 2020 for Design Engineer(Intern)?
PRIMARY ROLE & RESPONSIBILITIES
Xilinx are looking for motivated interns who can contribute to the design and verification of the IPs under development.
As an Intern you have to provide support for unit level design and verification of blocks. So that its meet the functional requirements.
You have to participate in the unit level verification.
You have to work on design and implement functional logic on that design.
You have to participate and see how to build management.
As an Intern you have to do the management of engineering design environment policies.
You have to perform some work on systems administration and also work on revision control management system via automation.
On Linux based compute environments you have to architect, qualifying, and implementing.
As an Intern you have to architect, qualifying, and implementing storage technology.
You have to manage engineering application servers like LAMP, Web, Jenkins, DB, Big Data.
As part of the team, you will have to work on some very critical tasks that will impact the entire silicon engineering organization.